发明名称 Utilizing a cache mechanism by copying a data set from a cache-disabled memory location to a cache-enabled memory location
摘要 Described herein are systems and methods to prevent a controller in a DDIO (data direct input output) system from shifting currently-required data out of a cache memory. In one embodiment, a compute element disables caching of some specific addresses in a non-cache memory, but still enables caching of other addresses in the non-cache memory, thereby practically disabling the DDIO system, so that data sets not currently needed are placed in the addresses in the non-cache memory which are not cached. As a result, currently-required data are not shifted out of cache memory. The compute element then determines that the data sets, which formerly avoided being cached, are now required. The system therefore copies the data sets that are now required from addresses in non-cache memory not accessible to cache memory, to addresses in non-cache memory accessible to cache memory, thereby allowing the caching and processing of such data sets.
申请公布号 US9639473(B1) 申请公布日期 2017.05.02
申请号 US201514934252 申请日期 2015.11.06
申请人 Parallel Machines Ltd. 发明人 Adda Michael;Braverman Avner;Amar Lior;Aloni Dan;Khermosh Lior;Zuckerman Gal
分类号 G06F13/00;G06F12/0875;G11C7/10;G06F12/0811;G06F12/1081 主分类号 G06F13/00
代理机构 Active Knowledge Ltd. 代理人 Active Knowledge Ltd.
主权项 1. A system operative to prevent a controller from automatically writing to a cache memory, comprising: a compute element; a memory operative to store data sets; a cache memory associated with the compute element and operative to cache the data sets in conjunction with the memory; and a controller operative to transfer data sets automatically from a data source to the cache memory, in which the data sets transferred are associated with specific addresses in the memory, thereby facilitating later updating of the data sets from the cache memory to the specific addresses in the memory, wherein: the system is configured to disable caching by the cache memory of at least the specific addresses in the memory, while still enabling caching by the cache memory of other addresses in the memory; the controller is configured, as a result of said disablement, to refrain from said transferring of data sets automatically from the data source to the cache memory, and instead, transfer the data sets from the data source to the specific addresses in the memory; and the compute element is configured to: (i) determine that the data sets are now needed for processing, and should therefore be cached in the cache memory, and (ii) cause the system, as a result of said determination, to copy the data sets from the specific addresses in the memory to the other addresses in the memory, thereby now allowing the caching and processing of the data sets.
地址 Tel Aviv IL