Semiconductor memory apparatus

摘要

A semiconductor memory apparatus includes a driving current control block configured to sense a resistance value of a dummy memory element, and generates a write driver control signal; and a write driving block configured to provide a driving voltage to a memory cell array in response to a write driver enable signal and the write driver control signal.

主权项

1. A semiconductor memory apparatus comprising:
a driving current control block configured to receive an option signal, sense resistance values of a plurality of dummy memory elements during an enable period of the option signal, and generate a plurality of write driver control signals; and a write driving block configured to determine the number of write drivers for generating a driving voltage, in response to a write driver enable signal and the plurality of write driver control signals, wherein the dummy memory elements are directly coupled to the driving current control block, wherein the write driving block includes the write drivers, wherein the number of the write drivers outputting the driving voltage corresponds to the number of write driver control signals which are enabled among the plurality of write driver control signals.