Differential temperature sensor with sensitivity set by current-mirror and resistor ratios without limiting DC bias

摘要

A differential on-chip temperature sensor circuit can be implemented in a standard complementary metal-oxide-semiconductor (CMOS) process using PNP transistors. A pair of transistors have collector currents that are sensitive to voltage, both directly and due to saturation currents. A scaling resistor connects to the emitter of one transistor and its voltage compared to the other transistor's emitter voltage by an error amplifier that generates a bias voltage to current sources that are proportional to absolute temperature since the saturation current sensitivity is subtracted out. The current is mirrored to sink current through a multiplier resistor from an output. An amplifier connected across the multiplier resistor compares a reference voltage to set the DC bias independent of temperature sensitivity. The temperature sensitivity is proportional to the ratio of the multiplier resistor and the scaling resistor, and is multiplied by a mirroring factor. A differential output is provided.

主权项

1. A differential temperature sensing circuit comprising:
a first junction device having a p-n junction that draws current from a first node as a function of temperature; a scaling resistor coupled between the first node and a first sense node; a first current source that generates a first current from a power supply to the first sense node in response to a bias voltage; a second junction device having a p-n junction that draws current from a second node as a function of temperature; a second current source that generates a second current from the power supply to the second node in response to the bias voltage; a difference amplifier that compares voltages of the first sense node and the second node to generate the bias voltage as a function of a voltage difference between the first sense node and the second node; a differential amplifier having a first differential input, a second differential input, a first differential output, and a second differential output; a third current source that generates a third current from the power supply in response to the bias voltage; a first current sink that sinks the third current to a ground supply to generate a mirror voltage; a second current sink that generates a first mirror current to the ground supply in response to the mirror voltage, the first mirror current being applied to the second differential input of the differential amplifier; a first multiplier resistor coupled between the first differential input of the differential amplifier and the second differential output of the differential amplifier; a second multiplier resistor coupled between the second differential input of the differential amplifier and the first differential output of the differential amplifier; and a fourth current source that generates a fourth current from the power supply in response to the bias voltage, the fourth current being applied to the first differential input of the differential amplifier.