发明名称 |
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE |
摘要 |
A non-volatile semiconductor memory device having an improved layout structure to achieve low power consumption, high speed and miniaturization is provided. A flash memory of the present invention includes a memory array formed with NAND type strings. The memory array includes a plurality of global blocks, one global block includes a plurality of blocks, and one block includes a plurality of NAND type strings. A plurality of local bit lines are shared by each of the plurality of blocks in one global block, a plurality of global bit lines are shared by the plurality of global blocks, and a connecting element selectively connecting one global bit line to n local bit lines is included. When a read-out operation and program operation are executed, one global bit line is shared by n local bit lines. |
申请公布号 |
US2017117046(A1) |
申请公布日期 |
2017.04.27 |
申请号 |
US201615141812 |
申请日期 |
2016.04.28 |
申请人 |
Winbond Electronics Corp. |
发明人 |
Yano Masaru |
分类号 |
G11C16/10;G11C16/04;G11C16/16;G11C16/26 |
主分类号 |
G11C16/10 |
代理机构 |
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代理人 |
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主权项 |
1. A non-volatile semiconductor memory device, comprising:
a memory array, comprising a plurality of global blocks, the one global block comprises a plurality of blocks, and the one block comprises a plurality of NAND type strings; a plurality of local bit lines, collectively connected to each of the plurality of blocks in the one global block; a plurality of global bit lines, shared by the plurality of global blocks; and a connecting element, selectively connecting the one global bit line to the m local bit lines, wherein m is an integer greater than 2, and when a read-out operation or a program operation of a selected page is executed in a selected block in the global block, the m local bit lines share the one global bit line via the connecting element. |
地址 |
Taichung City TW |