DISPLAY APPARATUS AND METHOD OF OPERATION

摘要

A display apparatus includes a display panel including a first pixel, a common voltage generator and a timing controller. The common voltage generator generates a reference common voltage, and provides the reference common voltage to the first pixel. The timing controller determines a dithering scheme for the first pixel based on first common voltage information, and generates first output pixel data by applying a dithering function to first input pixel data based on the dithering scheme for the first pixel. The first common voltage information indicates whether the reference common voltage is substantially equal to an optimal common voltage of the first pixel. A first data voltage provided to the first pixel is generated based on the first output pixel data. A polarity of the first data voltage is reversed with respect to the reference common voltage for each predetermined duration. A phase of the first data voltage is symmetric or asymmetric with respect to the reference common voltage depending on the dithering scheme for the first pixel.

主权项

1. A display apparatus comprising:
a display panel including a first pixel; a common voltage generator configured to generate a reference common voltage, and configured to provide the reference common voltage to the first pixel; and a timing controller configured to determine a dithering scheme for the first pixel based on first common voltage information, and configured to generate first output pixel data by applying a dithering function to first input pixel data based on the dithering scheme for the first pixel, the first common voltage information indicating whether the reference common voltage is less than, greater than, or substantially equal to an optimal common voltage of the first pixel, wherein a first data voltage provided to the first pixel is generated based on the first output pixel data, a polarity of the first data voltage is reversed with respect to the reference common voltage for each predetermined duration, and a phase of the first data voltage is symmetric or asymmetric with respect to the reference common voltage depending on the dithering scheme for the first pixel.