发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
摘要 A semiconductor device includes a trench-gate IGBT enabling the fine adjustment of a gate capacitance independent from cell performance. In a gate wiring lead-out region, a plurality of trenches is arranged spaced apart from each other in an X direction perpendicular to a Y direction. Each trench has a shape enclosed by a rectangular outer outline and a rectangular inner outline in plan view. A trench gate electrode is provided in each of the trenches so as to be electrically coupled to an extraction electrode. To obtain an adequate breakdown voltage between a collector and an emitter, the trenches are formed in a p-type floating region. An n−-type drift region is formed in a region located inside an inner outline of the trench in plan view, whereby a capacitance formed between the trench gate electrode and the n−-type drift region is used as the reverse transfer capacitance.
申请公布号 US2017117396(A1) 申请公布日期 2017.04.27
申请号 US201615298958 申请日期 2016.10.20
申请人 Renesas Electronics Corporation 发明人 MATSUURA Hitoshi
分类号 H01L29/739;H01L29/66;H01L29/49;H01L29/10 主分类号 H01L29/739
代理机构 代理人
主权项 1. A semiconductor device, comprising: a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; a first region provided at a center of the semiconductor substrate in plan view; and a second region provided outside the first region in plan view, wherein the first region includes: a plurality of first trenches extending in a first direction and arranged spaced apart from each other in a second direction perpendicular to the first direction at the first main surface; and a plurality of first trench gate electrodes provided in the respective first trenches via a first insulating film, wherein the second region includes: a plurality of second trenches arranged spaced apart from each other in the second direction, each of the second trenches having a shape enclosed by a rectangular outer outline and a rectangular inner outline in plan view, and a plurality of second trench gate electrodes provided in the respective second trenches via a second insulating film, wherein the second trench gate electrodes are electrically coupled together by an extraction electrode formed over the second trench gate electrodes, and wherein each of the first trenches leads to any one of the second trenches, and the second trench gate electrodes are electrically coupled to the first trench gate electrodes.
地址 Tokyo JP