Method to Specify or Extend the Number of Constant Bits Employing an Constant Extension Slot in the Same Execute Packet in a VLIW Processor

摘要

In a very long instruction word (VLIW) central processing unit instructions are grouped into execute packets that execute in parallel. A constant may be specified or extended by bits in a constant extension instruction in the same execute packet. If an instruction includes an indication of constant extension, the decoder employs bits of a constant extension instruction to extend the constant of an immediate field. Two or more constant extension slots are permitted in each execute packet, each extending constants for a different predetermined subset of functional unit instructions. In an alternative embodiment, more than one functional unit may have constants extended from the same constant extension instruction employing the same extended bits. A long extended constant may be formed using the extension bits of two constant extension instructions.

主权项

1. A method of specifying a constant for an instruction of a set of fixed length instructions, comprising the steps of:
setting a bit coding indicating constant specification in an instruction opcode of an instruction having a fixed length; storing a constant in a constant field of a constant extension instruction having said fixed length; fetching a predetermined number of fixed length instructions; determining which fetched instructions to dispatch simultaneously to corresponding functional units as an execute packet; and upon detection of an instruction having bit coding indicating constant specification, forming a constant for that instruction from said constant field of a constant extension instruction in the same execute packet with that instruction.