发明名称 ARRAY SUBSTRATE AND METHOD OF PREPARING THE SAME
摘要 The present disclosure discloses an array substrate and a method of preparing the array substrate. The method comprises providing a substrate having a display area thereon and forming a plurality of pixel structures in said display area. At least one of the plurality of pixel structures is prepared through the following procedures: forming successively, on the substrate, a patterned first metal layer which has a gate line and a floating metal pattern that is insulative to the gate line, a gate insulation layer, and a patterned second metal layer which has a data line, a source, and a drain, wherein the data line is arranged in correspondence with the floating metal pattern and spaced from the floating metal pattern through the gate insulation layer. The array substrate of the present disclosure can increase capacitance for storage of the static electricity generated in a dry plasma bombardment of the second metal layer, thus preventing electrostatic breakdown caused by insufficient capacitive storage.
申请公布号 US2017117265(A1) 申请公布日期 2017.04.27
申请号 US201414416314 申请日期 2014.08.20
申请人 SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. 发明人 CHAI Li
分类号 H01L27/02;G02F1/1368;G02F1/1362;G02F1/1333;H01L27/12;G02F1/1343 主分类号 H01L27/02
代理机构 代理人
主权项 1. A method of preparing an array substrate, comprising the steps of: providing a substrate having a display area thereon; and forming a plurality of pixel structures in said display area, wherein at least one of the plurality of pixel structures is prepared through the following procedures: forming successively, on the substrate, a patterned first metal layer which has a gate line and a floating metal pattern that is insulative to the gate line, a gate insulation layer, and a patterned second metal layer which has a data line, a source, and a drain, wherein the data line is arranged in correspondence with the floating metal pattern and spaced from the floating metal pattern through the gate insulation layer,forming a patterned protective layer on the patterned second metal layer, wherein the patterned protective layer has a via hole partially exposing the drain, andforming a patterned conductive layer as a pixel electrode on the patterned protective layer, wherein the pixel electrode is electrically connected to the drain through the via hole.
地址 Shenzhen, Guangdong CN