发明名称 |
SEMICONDUCTOR PACKAGE WITH INTEGRATED DIE PADDLES FOR POWER STAGE |
摘要 |
In one implementation, a semiconductor package includes a first conductive carrier including a first die paddle of the semiconductor package, and a control transistor having a drain attached to the first die paddle. The semiconductor package also includes a second conductive carrier attached to the first conductive carrier and including a second die paddle of the semiconductor package, and a sync transistor having a drain attached to the second die paddle. The second die paddle couples a source of the control transistor to the drain of the sync transistor. |
申请公布号 |
US2017117213(A1) |
申请公布日期 |
2017.04.27 |
申请号 |
US201715398505 |
申请日期 |
2017.01.04 |
申请人 |
Infineon Technologies Americas Corp. |
发明人 |
Cho Eung San;Abaca Aida;Guanzon Jobel A. |
分类号 |
H01L23/495;H01L21/48;H01L23/00 |
主分类号 |
H01L23/495 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
El Segundo CA US |