摘要 |
The present invention provides a data storage device including a flash memory and a controller. The controller equally distributes the TLC-data blocks into three regions. In a first stage, the controller determines a first TLC-data block corresponding to the logic address of a prewrite data sector, defines the region that contains the first TLC-data block as a first region, and determines whether the first TLC-data block has valid data. When the first TLC-data block does not have valid data, the controller selects a second TLC-data block and a third TLC-data block from the regions other than the first region for writing the prewrite data sector, into the first TLC-data block, the second TLC-data block and the third TLC-data block by a SLC storage mode. |
主权项 |
1. A data storage device, comprising:
a flash memory, having a plurality of SLC-spare blocks, a plurality of TLC-data blocks, and a plurality of TLC-spare blocks; and a controller, equally distributing the TLC-data blocks into three regions, the regions have the same number of TLC-data blocks, the controller further receives a prewrite data sector and a logic address of the prewrite data sector, and obtains a first sub-prewrite data sector, a second sub-prewrite data sector and a third sub-prewrite data sector according to the prewrite data sector and the logic address, wherein in a first stage, the controller further determines a first TLC-data block corresponding to the logic address according to the logic address, defines the region that contains the first TLC-data block as a first region, and determines whether the first TLC-data block has valid data, wherein in the first state, when the first TLC-data block does not have valid data, the controller respectively selects a second TLC-data block and a third TLC-data block from the regions other than the first region according to the first TLC-data block, respectively writes the first sub-prewrite data sector, the second sub-prewrite data sector and the third sub-prewrite data sector into the first TLC-data block, the second TLC-data block and the third TLC-data block by a SLC storage mode, and maps the first TLC-data block, the second TLC-data block and the third TLC-data block to the logic address. |