TECHNIQUES FOR ENTRY TO A LOWER POWER STATE FOR A MEMORY DEVICE

摘要

Examples are given for techniques for entry to a lower power state for a memory device or die. The examples to include delaying transitions of the memory device or die from a first higher consuming power state to a second relatively lower power state using one or more programmable counters maintained at or with the memory device.

主权项

1. An apparatus comprising:
a plurality of memory cells arranged to complete one or more operations responsive to a command received via a command bus; one or more first programmable counters maintained with the plurality of memory cells; and an interface to the one or more first programmable counters to enable a first count value to be programmed to one or more of the first programmable counters, the first count value to set a first delay for the plurality of memory cells to transition from an idle power state to a first low power state after completion of the one or more operations, the first low power state to cause the plurality of memory cells to consume less power compared to the idle power state.