| 发明名称 | Delay apparatus | ||
| 摘要 | A delay apparatus includes a plurality of stage circuits, a first current source, a second current source and a switch. The stage circuits connected in series to each other. The first current source is coupled to the first power terminal of the first stage circuit. In some embodiments, the second current source is coupled to the first power terminal of the second stage circuit, and the first and second terminals of the switch are respectively coupled to the first power terminal of the first stage circuit and the first power terminal of the second stage circuit. In other embodiments, the first and second terminals of the switch are respectively coupled to the first power terminal of the second stage circuit and the second current source, and the first power terminal of the first stage circuit is coupled to the first power terminal of the second stage circuit through a wire. | ||
| 申请公布号 | US9634651(B1) | 申请公布日期 | 2017.04.25 |
| 申请号 | US201615210870 | 申请日期 | 2016.07.14 |
| 申请人 | Novatek Microelectronics Corp. | 发明人 | Tseng Wei-Sheng |
| 分类号 | H03K5/134;H03K5/00 | 主分类号 | H03K5/134 |
| 代理机构 | Jianq Chyun IP Office | 代理人 | Jianq Chyun IP Office |
| 主权项 | 1. A delay apparatus, comprising: a plurality of stage circuits connected in series to each other, wherein the stage circuits comprise a first stage circuit and a second stage circuit; a first current source coupled to a first power terminal of the first stage circuit; a second current source coupled to a first power terminal of the second stage circuit; and a first switch having a first terminal and a second terminal, wherein the first terminal and the second terminal of the first switch are respectively coupled to the first power terminal of the first stage circuit and the first power terminal of the second stage circuit. | ||
| 地址 | Hsinchu TW | ||