Expedited servicing of store operations in a data processing system

摘要

In at least some embodiments, a processor core generates a store operation by executing a store instruction in an instruction sequence. The store operation is marked as a high priority store operation operation in response to detecting a barrier instruction in the instruction sequence immediately preceding the store instruction in program order and is not so marked otherwise. The store operation is buffered in a store queue associated with a cache memory of the processor core. Handling of the store operation in the store queue is expedited in response to the store operation being marked as a high priority store operation and not expedited otherwise.

主权项

1. A method of data processing in a data processing system, the method comprising:
a processor core generating a store operation by executing a store instruction in an instruction sequence; selectively marking the store operation as a high priority store operation, wherein the selectively marking includes: marking the store operation as a high priority store operation in response to detecting a barrier instruction in the instruction sequence immediately preceding the store instruction in program order; and refraining from marking the store operation as a high priority store operation in response to not detecting a harrier instruction in the instruction sequence immediately preceding the store instruction in program order; buffering the store operation within a store queue associated with a cache memory of the processor core; and expediting handling of the store operation in the store queue in response to the store operation being marked as a high priority store operation and otherwise refraining from expediting handling of the store operation in the store queue; wherein the barrier instruction is an instruction that guarantees completion of all store operations preceding the barrier instruction prior to completing any store operations following the barrier instruction.