发明名称 Memory system with multiple striping of raid groups and method for performing the same
摘要 A data memory system is described, where there may be an asymmetry in the time needed to write or erase data and the time needed to read data. The data may be stored using a RAID data storage arrangement and the reading, writing and erasing operations on the modules arranged such that the erasing and writing operations may be performed without significant latency for performing a read operation. Where a failure of a memory module in the memory system occurs, methods for recovering the data of the failed module are disclosed which may selected in accordance with policies that may relate to the minimizing the possibility of irretrievable data loss, or degradation of latency performance.
申请公布号 US9632870(B2) 申请公布日期 2017.04.25
申请号 US201012901224 申请日期 2010.10.08
申请人 Violin Memory, Inc. 发明人 Bennett Jon C. R.
分类号 G06F11/10;G11B20/18;G06F3/06 主分类号 G06F11/10
代理机构 Brinks Gilson & Lione 代理人 Brinks Gilson & Lione
主权项 1. A memory system, comprising: a processor in communication with a plurality of memory modules and with a user; each module of the plurality of memory modules comprised of FLASH memory circuits, configured to perform a read data operation, or configured to perform a write data operation, responsive to a request for data or data received from the user, respectively, or to perform an erase operation; and a group of memory modules of the plurality of memory modules configured such that data received from the user by the processor is written by the write data operation to one or more memory modules of the group of memory modules and redundancy data for user data is computed by the memory system and written by the write data operation to one or more memory modules of the group of memory modules, wherein, the memory system is configured to perform the write data to the memory modules of the group of memory modules or the erase data operation such that, responsive to a user request to read data stored in one or more memory modules of the group of memory modules, user data in response to the user request for data is provided without a time delay due to the write data operation or the erase operation; wherein, when the write data operation or the erase operation prevents the read data operation on the one or more memory modules where the requested user data is stored, sufficient stored data and redundancy data is read from other memory modules of the group of memory modules to reconstruct the user data, without waiting for a completion of the write operation or the erase operation, respectively.
地址 Santa Clara CA US