发明名称 Selective amorphization for signal isolation and linearity
摘要 Provided is a structure for improved electrical signal isolation between adjacent devices situated in a top semiconductor layer of the structure and a method for the structure's fabrication. The structure comprises a gate situated on the top semiconductor layer, the top semiconductor layer situated over a base oxide layer, and the base oxide layer situated over a handle wafer. The top surface of the handle wafer is amorphized by an inert implant of Xenon or Argon to reduce carrier mobility in the handle wafer and improve electrical signal isolation between the adjacent devices situated in the top semiconductor layer.
申请公布号 US9634089(B2) 申请公布日期 2017.04.25
申请号 US201414479009 申请日期 2014.09.05
申请人 Newport Fab, LLC 发明人 Hurwitz Paul D.;Zwingman Robert L.
分类号 H01L21/762;H01L29/10;H01L21/20;H01L29/06;H01L21/84;H01L27/12;H01L21/477 主分类号 H01L21/762
代理机构 Farjami & Farjami LLP 代理人 Farjami & Farjami LLP
主权项 1. A method for improving electrical signal isolation between adjacent devices situated in a top semiconductor layer, said method comprising: fabricating a gate and a protection mask on said top semiconductor layer, said top semiconductor layer situated over a base oxide layer, and said base oxide layer situated over a handle wafer; applying an inert implant through said top semiconductor layer and said base oxide layer, and into a top surface of said handle wafer, while protecting a region of said top semiconductor layer situated under and substantially aligned with said gate so as to amorphize said top surface of said handle wafer, thereby reducing carrier mobility in said handle wafer to improve electrical signal isolation between said adjacent devices situated in said top semiconductor layer; wherein said inert implant is applied to an entire top surface of said top semiconductor layer except said region situated under and substantially aligned with said gate, and produces damaged regions within said top semiconductor layer.
地址 Newport Beach CA US