发明名称 Video processor and activation method of video processor
摘要 A video processor includes: a judgement section configured to judge whether an input is a 2D or 3D image signal; an LR synthesis section configured to embed left and right image signals into an image signal in a side-by-side format to output the signal if the input is the 3D image signal and configured to embed a 2D image signal into a position corresponding to one of the left and right in an image signal in a side-by-side format to output the signal if the input is the 2D image signal; and an image processing section configured to apply image processing to the image signal in the side-by-side format.
申请公布号 US9635341(B2) 申请公布日期 2017.04.25
申请号 US201615286079 申请日期 2016.10.05
申请人 OLYMPUS CORPORATION 发明人 Sudo Masaru;Hase Kentaro;Yokouchi Masahito;Komine Hitoshi;Kono Hidetaro
分类号 H04N13/00;G06K9/62;G06T15/00 主分类号 H04N13/00
代理机构 Scully, Scott, Murphy & Presser, P.C. 代理人 Scully, Scott, Murphy & Presser, P.C.
主权项 1. A video processor comprising: a judgement section configured to judge whether an inputted image signal is a 3D image signal including a left image signal and a right image signal or a 2D image signal; an image signal synthesis section configured to embed the left image signal and the right image signal into an image signal in a side-by-side format to output the signal if the judgement section judges that the inputted image signal is the 3D image signal and configured to embed the 2D image signal into a position corresponding to one of a left image and a right image in an image signal in a side-by-side format to output the signal if the judgement section judges that the inputted image signal is the 2D image signal; and an image processing section configured to apply image processing to the image signal in the side-by-side format outputted by the image signal synthesis section.
地址 Tokyo JP