Semiconductor structure including a nonvolatile memory cell and method for the formation thereof

摘要

A semiconductor structure includes a nonvolatile memory cell including a first nonvolatile bit storage element and a second nonvolatile bit storage element which have a common source region provided in a semiconductor material and a common control gate structure. Each nonvolatile bit storage element includes a drain region, a channel region, a select gate structure, a floating gate structure and an erase gate structure. The channel region has a select gate side portion and a floating gate side portion. The select gate structure is provided at the select gate side portion of the channel region and the floating gate structure is provided at the floating gate side portion of the channel region. The erase gate structure is provided above the select gate structure and adjacent the floating gate structure. The control gate structure extends above the floating gate structures of the first and second nonvolatile bit storage elements.

主权项

1. A semiconductor structure, comprising:
a nonvolatile memory cell comprising a first nonvolatile bit storage element and a second nonvolatile bit storage element, said first and second nonvolatile bit storage elements having a common source region provided in a semiconductor material and a common control gate structure, each of said first and second nonvolatile bit storage elements comprising: a drain region and a channel region provided in said semiconductor material, said channel region having a select gate side portion and a floating gate side portion; a select gate structure at said select gate side portion of said channel region; a floating gate structure at said floating gate side portion of said channel region; and an erase gate structure above said select gate structure and adjacent said floating gate structure; wherein said floating gates for said first and second nonvolatile bit storage elements are separated by an isolation region, said floating gates for said first and second nonvolatile bit storage elements isolation structure have coplanar upper surfaces, and said common control gate structure is disposed on said coplanar upper surfaces and extends above said floating gate structures of said first and second nonvolatile bit storage elements.