发明名称 |
Readiness signaling between master and slave controllers of a liquid crystal display |
摘要 |
A liquid crystal display includes a liquid crystal panel and a first to nth control substrates (n is an integer which is 2 or greater) which control the liquid crystal panel. When the first control substrate enters an operable status, the first control substrate transmits a readiness signal to the second control substrate which is at a next stage, and when the nth control substrate determines that the nth control substrate receives a readiness signal from a control substrate at a previous stage and is in an operable status, the nth control substrate transmits a readiness signal to the first control substrate, thereby being able to suppress a synchronization failure between the plurality of control substrates which are provided in a liquid crystal display. |
申请公布号 |
US9633611(B2) |
申请公布日期 |
2017.04.25 |
申请号 |
US201214117902 |
申请日期 |
2012.05.17 |
申请人 |
SHARP KABUSHIKI KAISHA |
发明人 |
Inoue Akihiko |
分类号 |
G09G3/36;G09G3/20;G09G3/34 |
主分类号 |
G09G3/36 |
代理机构 |
Harness, Dickey & Pierce, P.L.C. |
代理人 |
Harness, Dickey & Pierce, P.L.C. |
主权项 |
1. A liquid crystal display comprising:
a liquid crystal panel having n separate display areas wherein n is an integer which is 2 or greater; and first to nth control substrates which control the respective display areas, wherein, when a power supply voltage of the first control substrate becomes equal to or larger than a first threshold, the first control substrate transmits a readiness signal to the second control substrate which is at a next stage, wherein, the nth control substrate transmits a readiness signal to the first control substrate based on the nth control substrate receiving a readiness signal from a control substrate at a previous stage and a power supply voltage of the nth control substrate becoming equal to or larger than an nth threshold, wherein the first control substrate receives a readiness signal from the nth control substrate and transmits a reset release signal to all of other control substrates, wherein reset states of the other control substrates are released in response to the reset release signal, wherein a timing controller is provided on each of the first to nth control substrates and the respective timing controllers are operated in synchronization with each other based on a synchronization signal, and wherein preparations of operations of timing controllers provided on the other control substrates are completed by the reset release signal. |
地址 |
Osaka JP |