发明名称 |
Data storage device and flash memory control method |
摘要 |
A data storage device with flash memory and a flash memory control method are disclosed, which upload the physical-to-logical address mapping information of one block to the flash memory section by section. A microcontroller is configured to allocate a flash memory to provide a first run-time write block. Between a first write operation and a second write operation of the first run-time write block, the microcontroller updates a logical-to-physical address mapping table in accordance with just part of a first physical-to-logical address mapping table. The logical-to-physical address mapping table is provided within the flash memory. The first physical-to-logical address mapping table is established in the random access memory to record logical addresses corresponding to physical addresses of one block. |
申请公布号 |
US9632880(B2) |
申请公布日期 |
2017.04.25 |
申请号 |
US201414534488 |
申请日期 |
2014.11.06 |
申请人 |
SILICON MOTION, INC. |
发明人 |
Lin Chien-Cheng;Liang Chia-Chi;Huang Chang-Chieh;Lee Jie-Hao |
分类号 |
G06F11/14;G06F12/02;G06F11/10;G11C29/52;G06F12/121;G11C29/04 |
主分类号 |
G06F11/14 |
代理机构 |
McClure, Qualey & Rodack, LLP |
代理人 |
McClure, Qualey & Rodack, LLP |
主权项 |
1. A data storage device, comprising:
a flash memory, divided into a plurality of blocks with each block comprising a plurality of pages; and a control unit, coupling the flash memory to a host and comprising a microcontroller and a random access memory, wherein: the microcontroller is configured to allocate the flash memory to provide a first run-time write block from the blocks; between a first write operation and a second write operation of the first run-time write block, the microcontroller updates a logical-to-physical address mapping table in accordance with a first section of physical-to-logical information while a second section of physical-to-logical information is waiting to be updated to the logical-to-physical address mapping table in a time interval between another pair of write operations performed on the first run-time write block; the logical-to-physical address mapping table is provided within the flash memory; and a first physical-to-logical address mapping table that provides the first and second sections of physical-to-logical information is established in the random access memory to record logical addresses corresponding to physical addresses of one block. |
地址 |
Jhubei, Hsinchu County TW |