发明名称 3D image display device including display panel and patterned retarder
摘要 A three-dimensional (3D) image display device includes a display panel including an upper substrate and a lower substrate, the lower substrate having a pixel array area overlapped with the upper substrate and a pad area formed on at least one side of the lower substrate outside the pixel array area, wherein the display panel displays a left eye image and a right eye image; and a patterned retarder attached to the display panel and having retarder patterns to apply first and second polarizations to light from the display panel corresponding to the left eye image and the right eye image, respectively, wherein the pad area includes a first area in which data pads extending from data lines of the pixel array area are formed, and a second area in which gate pads extending from gate lines of the pixel array area are formed, and wherein the first area is exposed when the display panel and the patterned retarder are attached.
申请公布号 US9632339(B2) 申请公布日期 2017.04.25
申请号 US200912643267 申请日期 2009.12.21
申请人 LG Display Co., Ltd. 发明人 Baik Insu;Kang Hoon;Roh Sudong
分类号 G02F1/1333;G02B27/22;G02B27/26;H04N13/04;G02F1/1345 主分类号 G02F1/1333
代理机构 Morgan, Lewis & Bockius LLP 代理人 Morgan, Lewis & Bockius LLP
主权项 1. A three-dimensional (3D) image display device, comprising: a display panel comprising an upper substrate and a lower substrate, the lower substrate comprising a pixel array area overlapped with the upper substrate and a pad area formed on at least one side of the lower substrate outside the pixel array area, the display panel displaying a left eye image and a right eye image; a patterned retarder comprising retarder patterns configured to apply first and second polarizations to light from the display panel corresponding to the left eye image and the right eye image, respectively; and a first polarizing film attached to the upper substrate between the upper substrate and the patterned retarder, wherein the upper substrate is between the lower substrate and the patterned retarder, wherein the pad area does not overlap the upper substrate and the patterned retarder, wherein a size of the patterned retarder is smaller than that of the lower substrate, and wherein the size of the patterned retarder is larger than that of the upper substrate.
地址 Seoul KR