发明名称 Clock generator and integrated circuit using the same and injection-locked phase-locked loop control method
摘要 A control technique for an injection-locked phase-locked loop (ILPLL) includes the following steps: providing the ILPLL with a sampling clock and an injection clock for an integral path and a proportional path of the ILPLL, respectively; making a change in the power level of the injection clock to get the phase error of the integral path of the ILPLL; and controlling the phase difference between the sampling clock and the injection clock based on the phase error of the integral path of the ILPLL.
申请公布号 US9634677(B2) 申请公布日期 2017.04.25
申请号 US201615052183 申请日期 2016.02.24
申请人 MEDIATEK INC. 发明人 Huang Yi-Chieh
分类号 H03L7/06;H03L7/099 主分类号 H03L7/06
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A clock generator, comprising: an injection-locked phase-locked loop for generation of an output clock, receiving a sampling clock and an injection clock for an integral path and a proportional path of the injection-locked phase-locked loop, respectively; a pulse-power controller, controlling power level of the injection clock; delay elements for the sampling clock and the injection clock; and a delay control circuit, coupled between the injection-locked phase-locked loop and the delay elements to control the delay elements based on a phase error of the integral path of the injection-locked phase-locked loop, wherein the phase error is due to a change, caused by the pulse-power controller, in the power level of the injection clock.
地址 Hsin-Chu TW