发明名称 Read methods of memory devices using bit line sharing
摘要 A program method of a nonvolatile memory device includes loading first word line data to be stored in first memory cells connected to a first word line and second word line data to be stored in second memory cells connected to a second word line; setting up upper bit lines according to the first word line data; turning off bit line sharing transistors after the upper bit lines are set up; setting up lower bit lines according to the second word line data; performing a first program operation on the first memory cells using the upper bit lines; turning on the bit line sharing transistors; and performing a second program operation on the second memory cells using the lower bit lines. The bit line sharing transistors electrically connect the upper bit lines and the lower bit lines in response to a bit line sharing signal.
申请公布号 US9633704(B2) 申请公布日期 2017.04.25
申请号 US201615188461 申请日期 2016.06.21
申请人 Samsung Electronics Co., Ltd. 发明人 Kang Dongku
分类号 G11C16/04;G11C7/12;G11C16/10;G11C16/34;G11C16/24;G11C7/06 主分类号 G11C16/04
代理机构 Myers Bigel, P.A. 代理人 Myers Bigel, P.A.
主权项 1. A read method of a memory device, comprising: pre-charging upper bit lines and lower bit lines by turning on bit line sharing transistors; turning off the bit line sharing transistors after pre-charging the upper bit lines and the lower bit lines; applying a read voltage to first and second word lines selected according to an address; performing a first sensing operation to sense data of first memory cells connected with the first word lines through upper sense latches connected with the upper word lines; performing a second sensing operation to sense data of second memory cells connected with second word lines through lower sense latches connected with the lower word lines; transferring data stored at the upper sense latches and data stored at the lower sense latches to data latches; and outputting data stored at the data latches, wherein the bit line sharing transistors electrically connect the upper bit lines and the lower bit lines in response to a bit line sharing signal, and wherein the first and second sensing operations are both performed by a page data unit.
地址 KR