| 发明名称 |
ELECTRONIC DEVICE AND DATA VERIFICATION METHOD |
| 摘要 |
The electronic device has a falsification detection bit string generation circuit, a transmission data generation circuit, and a data output circuit. The falsification detection bit string generation circuit generates a transmission falsification detection bit string having a bit array in which at least one “0” to “1” are changed depending on changing at least one “1” of a transmission bit string to “0”. The transmission data generation circuit generates transmission data including a transmission bit string and a transmission falsification detection bit string and the data output circuit transmits the transmission data in the open drain output mode. |
| 申请公布号 |
US2017109545(A1) |
申请公布日期 |
2017.04.20 |
| 申请号 |
US201615291565 |
申请日期 |
2016.10.12 |
| 申请人 |
FUJITSU LIMITED |
发明人 |
YAMAMOTO Dai;Morikawa Ikuya |
| 分类号 |
G06F21/72;G06F21/60;G06F21/44 |
主分类号 |
G06F21/72 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An electronic device comprising:
a falsification detection bit string generation circuit configured to generate a transmission falsification detection bit string having a bit array in which at least one “0” is changed to “1” when at least one “1” of a transmission bit string is changed to “0”; a transmission data generation circuit configured to generate transmission data including the transmission bit string and the transmission falsification detection bit string; and a data output circuit configured to transmit the transmission data in an open drain output mode. |
| 地址 |
Kawasaki-shi JP |
