发明名称 SPEECH RECOGNITION CIRCUIT USING PARALLEL PROCESSORS
摘要 A speech recognition circuit comprises an input buffer for receiving processed speech parameters. A lexical memory contains lexical data for word recognition. The lexical data comprises a plurality of lexical tree data structures. Each lexical tree data structure comprises a model of words having common prefix components. An initial component of each lexical tree structure is unique. A plurality of lexical tree processors are connected in parallel to the input buffer for processing the speech parameters in parallel to perform parallel lexical tree processing for word recognition by accessing the lexical data in the lexical memory. A results memory is connected to the lexical tree processors for storing processing results from the lexical tree processors and lexical tree identifiers to identify lexical trees to be processed by the lexical tree processors. A controller controls the lexical tree processors to process lexical trees identified in the results memory by performing parallel processing on a plurality of said lexical tree data structures.
申请公布号 US2017110122(A1) 申请公布日期 2017.04.20
申请号 US201615392396 申请日期 2016.12.28
申请人 Zentian Limited 发明人 Catchpole Mark
分类号 G10L15/187;G10L15/05;G10L15/34 主分类号 G10L15/187
代理机构 代理人
主权项 1. A speech recognition circuit comprising: input means for receiving processed speech parameters; lexical memory means containing lexical data for word recognition, said lexical data comprising a plurality of lexical tree data structures, each lexical tree data structure comprising a model of words having common prefix components, an initial component of each lexical tree data structure being unique; a plurality of lexical tree processors connected in parallel to said input means for processing the speech parameters in parallel to perform parallel lexical tree processing for word recognition by accessing said lexical data in said lexical memory means; results memory means connected to said lexical tree processors for storing processing results from said lexical tree processors and lexical tree identifiers to identify lexical trees to be processed by said lexical tree processors; and control processor means for controlling said lexical tree processors to process lexical trees identified in said results memory means by performing parallel processing on a plurality of said lexical tree data structures.
地址 Cambridge GB