发明名称 |
SYSTEM AND METHOD FOR PAGE-BY-PAGE MEMORY CHANNEL INTERLEAVING |
摘要 |
Systems and methods are disclosed for providing memory channel interleaving with selective power or performance optimization. One such method comprises configuring a memory address map for two or more memory devices accessed via two or more respective memory channels with an interleaved region and a linear region. The interleaved region comprises an interleaved address space for relatively higher performance tasks. The linear region comprises a linear address space for relatively lower power tasks. A request is received from a process for a virtual memory page. The request comprises a preference for power savings or performance. The virtual memory page is assigned to a free physical page in the linear region or the interleaved region according to the preference for power savings or performance. |
申请公布号 |
US2017108911(A1) |
申请公布日期 |
2017.04.20 |
申请号 |
US201514885793 |
申请日期 |
2015.10.16 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
CHUN DEXTER TAMIO;LI YANRU |
分类号 |
G06F1/32;G06F12/10 |
主分类号 |
G06F1/32 |
代理机构 |
|
代理人 |
|
主权项 |
1. A memory channel interleaving method with selective power or performance optimization, the method comprising:
configuring a memory address map for two or more memory devices accessed via two or more respective memory channels with an interleaved region and a linear region, the interleaved region comprising an interleaved address space for relatively higher performance tasks and the linear region comprising a linear address space for relatively lower power tasks; receiving a request from a process for a virtual memory page, the request comprising a preference for power savings or performance; and assigning the virtual memory page to a free physical page in the linear region or the interleaved region according to the preference for power savings or performance. |
地址 |
SAN DIEGO CA US |