STACKED PACKAGE STRUCTURE AND STACKED PACKAGING METHOD FOR CHIP

摘要

A stacked package structure for a chip, can include: a substrate having a first surface and a second surface opposite thereto; a first die having an active and back faces, where the active face of the first die includes pads; a first enclosure that covers the first die; an interlinkage that extends to the first enclosure to electrically couple with the pads; a first redistribution body electrically coupled to the interlinkage, and being partially exposed on a surface of the stacked package structure to provide outer pins for electrically coupling to external circuitry; a penetrating body that penetrates the first enclosure and substrate; a second die having an electrode electrically coupled to a first terminal of the penetrating body; and a second terminal of the penetrating body that is exposed on the surface of the stacked package structure to provide outer pins for electrically coupling to the external circuitry.

主权项

1. A stacked package structure for a chip, comprising:
a) a substrate having a first surface and a second surface opposite thereto; b) a first die having an active face and a back face opposite thereto, wherein said first die is arranged above said first surface of said substrate, said back face of said first die is relatively close to said first surface of said substrate, and said active face of said first die comprises pads; c) a first enclosure that covers said first die; d) at least one interlinkage that extends to said first enclosure to electrically couple with said pads; e) at least one first redistribution body electrically coupled to said interlinkage, and being partially exposed on a surface of said stacked package structure to provide outer pins for electrically coupling to external circuitry; f) at least one penetrating body that penetrates said first enclosure and said substrate; g) a second die having at least one electrode electrically coupled to a first terminal of said penetrating body; and h) a second terminal of said penetrating body that is at least partially exposed on said surface of said stacked package structure to provide outer pins for electrically coupling to said external circuitry.