发明名称 VERTICAL POWER TRANSISTOR WITH THIN BOTTOM EMITTER LAYER AND DOPANTS IMPLANTED IN TRENCHES IN SHIELD AREA AND TERMINATION RINGS
摘要 Various improvements in vertical transistors, such as IGBTs, are disclosed. The improvements include forming periodic highly-doped p-type emitter dots in the top surface region of a growth substrate, followed by growing the various transistor layers, followed by grounding down the bottom surface of the substrate, followed by a wet etch of the bottom surface to expose the heavily doped p+ layer. A metal contact is then formed over the p+ layer. In another improvement, edge termination structures utilize p-dopants implanted in trenches to create deep p-regions for shaping the electric field, and shallow p-regions between the trenches for rapidly removing holes after turn-off. In another improvement, a dual buffer layer using an n-layer and distributed n+ regions improves breakdown voltage and saturation voltage. In another improvement, p-zones of different concentrations in a termination structure are formed by varying pitches of trenches. In another improvement, beveled saw streets increase breakdown voltage.
申请公布号 US2017110535(A1) 申请公布日期 2017.04.20
申请号 US201615259877 申请日期 2016.09.08
申请人 MaxPower Semiconductor, Inc. 发明人 Yilmaz Hamza
分类号 H01L29/06;H01L29/78;H01L29/10;H01L21/225;H01L21/304;H01L21/306;H01L21/265;H01L21/324;H01L29/739;H01L29/66 主分类号 H01L29/06
代理机构 代理人
主权项 1. A method of forming a vertical power device comprising: providing a substrate, the substrate having a top surface and a bottom surface; doping a top surface region of the substrate with dopants of a first conductivity type, such that the top surface region of the substrate is a more highly doped first conductivity type than a bottom surface region of the substrate; growing an epitaxial layer of a second conductivity type over the top surface of the substrate, and forming regions of the first conductivity type and the second conductivity type, to form a vertical power device; forming a first metal electrode on top of the vertical power device; grinding down the bottom surface of the substrate; wet etching the ground-down bottom surface of the substrate, using a silicon etchant, using the more highly doped first conductivity type top surface region of the substrate as an etch stop to expose the top surface region on the bottom of the vertical power device; and forming a second metal electrode on the bottom of the vertical power device.
地址 San Jose CA US