VECTOR SIGNALING CODES WITH HIGH PIN-EFFICIENCY FOR CHIP-TO-CHIP COMMUNICATION AND STORAGE

摘要

An alternative type of vector signaling codes having increased pin-efficiency normal vector signaling codes is described. Receivers for these Permutation Modulation codes of Type II use comparators requiring at most one fixed reference voltage. The resulting systems can allow for a better immunity to ISI-noise than those using conventional multilevel signaling such as PAM-X. These codes are also particularly advantageous for storage and recovery of information in memory, as in a DRAM.

主权项

1. An apparatus comprising:
a plurality of groups of adjacent memory cells, each group of adjacent memory cells holding elements of a balanced, reference-less vector signaling codeword as charge levels; for each group of adjacent memory cells, a respective set of sense amplifiers, each sense amplifier configured to receive at least one element of the balanced, reference-less vector signaling codeword, the respective set of sense amplifiers configured to generate a plurality of sense amplifier values; and a logic decoder configured to receive the plurality of sense amplifier values from the respective set of sense amplifiers and to responsively generate a set of output bits.