发明名称 ENHANCED MEMORY BUILT-IN SELF-TEST ARCHITECTURE FOR DE-FEATURED MEMORIES
摘要 A method and apparatus for testing a device memory. The method begins with a generated data and address width from an automatic testing system. The generated data width and the generated address width is compared with the required data width and address width of a device under test and used to set a user bit. If the generated data width and address width match the required data and address width, the user bit is set to zero. If the generated data width and address width do not match the required data width and address width, the user bit is set to 1. The user bit provides address control and data control during testing. The apparatus includes a wireless test access protocol that is electrically connected to a glue logic module. A wireless test access port is electrically connected to the glue logic module as is the device under test.
申请公布号 US2017110204(A1) 申请公布日期 2017.04.20
申请号 US201514885840 申请日期 2015.10.16
申请人 QUALCOMM Incorporated 发明人 Kothiala Abhinav;Bhushan Singh Nishi;Tiwari Rajesh;Bhat Anand;Anand Ashutosh;Bhat Shankarnarayan
分类号 G11C29/38;G11C29/44 主分类号 G11C29/38
代理机构 代理人
主权项 1. A method for testing a device memory, comprising: determining a generated data width; determining a generated address width; comparing the generated data width and the generated address width with a device under test required data width and a device under test required address width; setting a user bit based on the comparison; and testing the device memory based on the user bit setting.
地址 San Diego CA US