发明名称 |
Semiconductor device, electronic component, and electronic device |
摘要 |
Provided is a semiconductor device having a memory cell array, which is capable of existing in three power-gating states depending on a non-access period to the memory cell array. The memory cell array includes a plurality of memory cells which each have an SRAM and a nonvolatile memory portion having a transistor with an oxide semiconductor in a channel region. The three power-gating states includes: a first state in which a power-gating to the memory cell array is performed; a second state in which the power-gating is performed on the memory cell array and peripheral circuits which control the memory cell array; and a third state in which, in addition to the memory cell array and the peripheral circuits, a power supply voltage supplying circuit is subjected to the power gating. |
申请公布号 |
US9627010(B2) |
申请公布日期 |
2017.04.18 |
申请号 |
US201514659914 |
申请日期 |
2015.03.17 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Ishizu Takahiko;Kato Kiyoshi;Onuki Tatsuya;Uesugi Wataru |
分类号 |
G11C5/14;G11C11/409;G11C11/4074;G11C11/419 |
主分类号 |
G11C5/14 |
代理机构 |
Fish & Richardson P.C. |
代理人 |
Fish & Richardson P.C. |
主权项 |
1. A semiconductor device comprising:
a memory device including a memory cell, a drive control circuit, a data control circuit, and first to third power switches; a power supply voltage control circuit; and a power supply voltage generation circuit, wherein the memory cell has a function that data writing and reading are controlled by the drive control circuit, wherein the memory cell has a function of saving and restoring the data to a nonvolatile memory portion by control of the data control circuit, wherein the power supply voltage control circuit has a function of controlling on and off of the first to third power switches, wherein the power supply voltage generation circuit has a function of generating first to third power supply voltages based on a reference voltage, wherein the first power switch has a function of supplying the first power supply voltage from the power supply voltage generation circuit to the memory cell, wherein the second power switch has a function of supplying the second power supply voltage from the power supply voltage generation circuit to the drive control circuit, wherein the third power switch has a function of supplying the third power supply voltage from the power supply voltage generation circuit to the data control circuit, and wherein the power supply voltage control circuit has a function of switching a first state where the first power switch is off, a second state where the first to third power switches are off, and a third state where generation of the first to third power supply voltages is stopped. |
地址 |
Atsugi-shi, Kanagawa-ken JP |