Light emission driver for display device, display device and driving method thereof

摘要

A light emission driver for a display device is disclosed. In one aspect, the driver includes a first node to which first and second light emitting power source voltages are applied according to respective clock signals. The driver also includes a second node to which the first and third light emitting power source voltages are applied according to the respective clock signals. The driver further includes first and second transistors respectively turned on by the first and second nodes and respectively transmitting the second and first light emitting power source voltages to a light emitting signal output terminal, respectively.

主权项

1. A light emission driver for a display device comprising:
a plurality of light emitting driving blocks, wherein each of the light emitting driving blocks is configured to receive first, second and third light emitting power source voltages and comprises: a first node to which the second light emitting power source voltage is applied according to a first clock signal input to a first clock signal input terminal and the first light emitting power source voltage is applied according to a second clock signal input to a second clock signal input terminal; a second node to which the first light emitting power source voltage is applied according to the first clock signal and the third light emitting power source voltage is applied according to the second clock signal, wherein the second node is electrically connected to a reverse light emitting signal output terminal; a first transistor configured to be turned on by the first node and configured to transmit the second light emitting power source voltage to a light emitting signal output terminal; a second transistor configured to be turned on by the second node and configured to transmit the first light emitting power source voltage to the light emitting signal output terminal; a third transistor including a gate electrode electrically connected to the first node, a first electrode electrically connected to the first light emitting power source voltage, and a second electrode electrically connected to the second node; a third node to which a third clock signal input to the second clock signal input terminal is applied according to a relay signal applied to a sequential input terminal from the previously arranged light emitting driving block and a fourth clock signal input to the first clock signal input terminal; and a fourth transistor including 1) a gate electrode electrically connected to the third node, 2) a first electrode electrically connected to the third light emitting power source voltage, and 3) a second electrode electrically connected to the second node, wherein the third light emitting power source voltage is different from the first and second light emitting power source voltages and is configured to drive reverse light emitting signals to be output to the reverse light emitting signal output terminal, and wherein the second node is electrically connected to a relay signal output terminal configured to output a relay signal applied to a sequential input terminal of the next light emitting driving block.