Computer system using partially functional processor core

摘要

A multiple processor core computer system interface assigns instructions to partially functional processor cores based on processing resources available in each partially functional core. Each processor core is labeled as fully functional, partially functional, or non-functional, and an indicator is provided for each partially functional processor core that shows what processing resources are available for a respective core. The indicators can be stored in memory after final test. The interface can monitor cores for changes in available resources and update respective indicators, such as by superseding an existing indicator with or creating a new indicator in read-write memory.

主权项

1. A computer system comprising:
a plurality of processor cores coupled to a system interconnect, each processor core having processing resources including a plurality of execution units; a system memory, a memory interface unit coupled to the system memory, the memory interface unit including a memory controller, and the memory interface unit coupled to the system interconnect; and a system interface coupled to the system interconnect to:
determine a status of each processor core, the status including one of fully functional, partially functional, or non-functional;determine available processing resources for any partially functional processor core;receive a current instruction via the memory interface;determine what processing resources are needed to process the current instruction; and convert, using a just-in-time (JIT) compiler, the current instruction to at least one converted instruction compatible with a processor core that lacks a processing resource otherwise required to process the current instruction.