发明名称 Method and apparatus for interconnect test
摘要 A test circuitry for testing an interconnection between interconnected dies includes a cell embedded within one of the dies. The cell includes a selection logic module that includes a first multiplexer configured to receive a first control signal and provide a first output test signal, and a second multiplexer configured to receive a second control signal and provide a second output test signal. The cell includes a scannable data storage module coupled to the first multiplexer; and a transition generation module configured to receive a third control signal; wherein the first and second output test signals are generated based on respective states of the first, second, and third control signals, and wherein the test circuitry is configured to use the first and second output test signals to perform at least two of: a DC test on the interconnection, an AC test on the interconnection, and a burn-in-test on the interconnection.
申请公布号 US9625523(B2) 申请公布日期 2017.04.18
申请号 US201615156140 申请日期 2016.05.16
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Goel Sandeep Kumar;Adham Saman M. I.
分类号 G11C29/00;G06F11/00;G01R31/317;G11C29/50;G01R31/28;G01R31/3177 主分类号 G11C29/00
代理机构 Duane Morris LLP 代理人 Duane Morris LLP
主权项 1. A test circuitry for testing an interconnection between interconnected dies, comprising: a cell embedded within one of the interconnected dies, the cell comprising: a selection logic module, comprising: a first multiplexer configured to receive a first control signal and provide a first output test signal; and a second multiplexer configured to receive a second control signal and provide a second output test signal; a scannable data storage module coupled to the first multiplexer; and a transition generation module configured to receive a third control signal; wherein the first and second output test signals are generated based on a combination of states of the first, second, and third control signals, and wherein the test circuitry is configured to use the first and second output test signals to perform at least two of: a DC test on the interconnection in a first mode, an AC test on the interconnection in a second mode, and a burn-in-test on the interconnection in a third mode.
地址 Hsin-Chu TW