发明名称 Memory device for a hierarchical memory architecture
摘要 In various embodiments, a hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy and/or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device. Other embodiments are discussed.
申请公布号 US9626327(B2) 申请公布日期 2017.04.18
申请号 US201514840733 申请日期 2015.08.31
申请人 Micron Technology, Inc. 发明人 Eilert Sean;Leinwander Mark
分类号 G06F12/02;G06F3/06;G06F13/42;G11C13/00;G06F12/08 主分类号 G06F12/02
代理机构 Schwegman Lundberg & Woessner, P.A. 代理人 Schwegman Lundberg & Woessner, P.A.
主权项 1. A hierarchical memory device, comprising: at least one input port and a plurality of output ports such that the hierarchical memory device is simultaneously connectable in both a daisy-chain hierarchy and a hierarchical tree structure with other hierarchical memory devices, the hierarchical memory device being configured to switch traffic between the at least one input port and one of the plurality of output ports to reduce a round-trip latency to a lowest layer of the hierarchical tree structure; and a plurality of interfaces having different memory formats, the plurality of interfaces including a NAND interface and a mass storage device interface.
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