Methods of manufacturing semiconductor devices with improved metal gate fill-in for vertical memory cell and devices thereof

摘要

Provided are improved semiconductor memory devices and methods for manufacturing such semiconductor memory devices. The methods may include two or more nitride removal steps during formation of gate layers in vertical memory cells. The two or more nitride removal steps may allow for wider gate layers increasing the gate fill-in, reducing the occurrence of voids, and thereby improving the word line resistance.

主权项

1. A method of manufacturing a vertical memory cell comprising:
providing a substrate; forming a plurality of alternating gate insulating layers and nitride layers; etching one or more channels orthogonal to the plurality of alternating gate insulating layers and nitride layers; performing a first nitride removal step using a phosphoric acid reagent comprising silicon to form a first space having a first width; and performing a second nitride removal step using a phosphoric acid reagent to form a second space having a second width, wherein the first width is larger than the second width.