发明名称 |
Methods and apparatuses to form self-aligned caps |
摘要 |
At least one conductive line in a dielectric layer over a substrate is recessed to form a channel. The channel is self-aligned to the conductive line. The channel can be formed by etching the conductive line to a predetermined depth using a chemistry comprising an inhibitor to provide uniformity of etching independent of a crystallographic orientation. A capping layer to prevent electromigration is deposited on the recessed conductive line in the channel. The channel is configured to contain the capping layer within the width of the conductive line. |
申请公布号 |
US9627321(B2) |
申请公布日期 |
2017.04.18 |
申请号 |
US201514675613 |
申请日期 |
2015.03.31 |
申请人 |
Intel Corporation |
发明人 |
Boyanov Boyan;Singh Kanwal Jit |
分类号 |
H01L23/532;H01L21/768;H01L23/485;H01L23/528 |
主分类号 |
H01L23/532 |
代理机构 |
Blakely, Sokoloff, Taylor & Zafman LLP |
代理人 |
Blakely, Sokoloff, Taylor & Zafman LLP |
主权项 |
1. An apparatus, comprising:
a substrate comprising silicon; an interlayer dielectric layer over the substrate, the interlayer dielectric layer comprising silicon, oxygen, and carbon, the interlayer dielectric layer having a top boundary; a trench in the interlayer dielectric layer, the trench having internal sidewalls; a barrier layer comprising tantalum and nitrogen on the internal sidewalls of the trench; a conductive material in the trench, the barrier layer between the conductive material and the interlayer dielectric layer; and a capping region comprising cobalt directly on the top of the conductive material comprising copper and cobalt, a top of the capping region near the interlayer dielectric layer being no higher than the top boundary of the interlayer dielectric layer that is near the capping region. |
地址 |
Santa Clara CA US |