发明名称 Display device and output buffer circuit for driving the same
摘要 Disclosed herein is a display device including: a plurality of pixel circuits; a power source line connected to corresponding ones of the plurality of pixel circuits; and an output buffer circuit for supplying currents to corresponding ones of the plurality of pixel circuits by alternately applying a first potential applied to a first power source supply terminal, and a second potential applied to a second power source supply terminal to the power source line. The output buffer includes a variable resistance circuit connected to a path between the first power source supply terminal and the power source line, the variable resistance circuit serving to change a resistance value thereof in accordance with a magnitude of a total sum of the currents.
申请公布号 US9626914(B2) 申请公布日期 2017.04.18
申请号 US201615094270 申请日期 2016.04.08
申请人 Sony Corporation 发明人 Tanikame Takao
分类号 G09G3/32;G09G3/30;G09G3/3283;G09G3/3233;G09G3/3266;G09G3/3291 主分类号 G09G3/32
代理机构 Michael Best & Friedrich LLP 代理人 Michael Best & Friedrich LLP
主权项 1. An organic EL display device, comprising: a plurality of pixel circuits; a first control line electrically connected to corresponding ones of the plurality of pixel circuits; and a first driving circuit, including: a first potential line electrically connected through a first signal path to the first control line such that a first signal appearing on the first potential line can be selectively applied as a corresponding first control signal to the first control line;a second potential line electrically connected through a second signal path to the first control line such that a second signal appearing on the second potential line can be selectively applied as the corresponding first control signal to the first control line; anda variable resistance circuit including a transistor, wherein the first driving circuit is configured to supply signals to the corresponding ones of the plurality of pixel circuits by applying the corresponding first control signal selectively from either the first signal or the second signal to the first control line, and wherein a gate of the transistor is electrically connected to the first control line.
地址 Tokyo JP