| 摘要 |
A read sensing method for an OTP non-volatile memory is provided. The memory array is connected with plural bit lines. The read sensing method includes following steps. Firstly, the plural bit lines are precharged to a precharge voltage. Then, a selected memory cell of the memory array is determined, wherein the selected memory cell is connected with a first bit line of the plural bit lines. Then, the bit line corresponding to the selected memory cell is connected with the data line, and the data line is discharged to a reset voltage. After a cell current from the selected memory cell is received, a voltage level of the data line is gradually changed from the reset voltage. According to a result of comparing a voltage level of the data line with a comparing voltage, an output signal is generated. |
| 主权项 |
1. An OTP non-volatile memory, comprising:
a memory array comprising M×N memory cells, wherein the memory array is connected with M word lines and N bit lines; a controlling circuit comprising a voltage generator, a word line driver, a column driver and a timing controller, wherein the voltage generator provides plural supply voltages to the memory array, the word line driver is connected with the M word lines for determining one of the M word lines as a selected word line, the column driver generates N column decoding signals and activates one of the plural column decoding signals at a time, and the timing controller generates a precharge signal, a reset signal and an enable signal; a precharge circuit connected with the N bit lines, wherein the precharge signal is activated for the precharge circuit to provides a precharge voltage to the N bit lines after the selected word line is determined; a column selector connected with the N bit lines and a data line, wherein the column selector determines one of the N bit lines as a selected bit line according to the N column decoding signals after the precharge signal is activated, so that the selected bit line is connected with the data line; a reset circuit connected with the data line, wherein the reset signal is activated for the reset circuit to provides a reset voltage to the data line after the selected bit line is determined, wherein the precharge voltage is higher than the reset voltage; and a sense amplifier connected with the data line and receiving a comparing voltage, wherein when the enable signal is activated, the sense amplifier generates an output signal according to a result of comparing a voltage level of the data line with the comparing voltage. |
