发明名称 Serial capacitance tuner
摘要 An impedance matching network comprises a first signal terminal configured to receive a signal from a source circuit and a second signal terminal configured to provide the signal to a load circuit. The network further comprises a series branch comprising a variable capacitive component between the first signal terminal and the second signal terminal. The variable capacitive component comprises a plurality of capacitive portions connected in series, wherein at least one of the capacitive portions comprises a switching element comprising a stack of series connected transistors. The impedance matching network also comprises a control component configured to control a capacitance of the variable capacitive component by controlling the at least one of the capacitive portions based on a predetermined algorithm.
申请公布号 US9627882(B2) 申请公布日期 2017.04.18
申请号 US201514672370 申请日期 2015.03.30
申请人 Infineon Technologies AG 发明人 Bakalski Winfried
分类号 H03H11/28;H02H9/04;H03H7/40 主分类号 H03H11/28
代理机构 Eschweiler & Potashnik, LLC 代理人 Eschweiler & Potashnik, LLC
主权项 1. An impedance matching network, comprising: a first signal terminal configured to receive a signal from a source circuit; a second signal terminal configured to provide the signal to a load circuit; a series branch comprising a variable capacitive component between the first signal terminal and the second signal terminal, the variable capacitive component comprising a plurality of capacitive portions connected in series, wherein at least one of the capacitive portions is a variable capacitive portion comprising a switching element comprising a stack of series connected transistors, wherein a combination of off-capacitances of the series connected transistors provide a capacitance of the variable capacitive portion; a control component configured to control a capacitance of the variable capacitive component by controlling the at least one variable capacitive portion, based on an impedance of the source circuit and the load circuit, in accordance with a predetermined algorithm, wherein controlling the variable capacitive portion comprises switching on or off the switching element associated with the variable capacitive portion; wherein the at least one variable capacitive portion comprises a first capacitive portion comprising a first switching element comprising a stack of series connected transistors and a second capacitive portion comprising a second switching element comprising a stack of series connected transistors; wherein the first capacitive portion comprising the first switching element and the second capacitive portion comprising the second switching element are connected in series; and the control component is configured to control the variable capacitive portion by switching on or off the first capacitive portion comprising the first switching element and the second capacitive portion comprising the second switching element in series, in steps of one, in a predetermined direction, in accordance with the predetermined algorithm, in order to avoid voltage overstress, wherein the switching on or off of the first capacitive portion and the second capacitive portion comprises switching on or off the first switching element and the second switching element, respectively.
地址 Neubiberg DE