发明名称 Nanowires coated on traces in electronic devices
摘要 Methods and devices including the formation of a layer of nanowires on wiring line traces are described. One device comprises a first dielectric layer and a plurality of traces on the first dielectric layer, the traces comprising Cu. The traces include a layer of ZnO nanowires positioned thereon. A second dielectric layer is positioned on the first dielectric layer and on the traces, wherein the second dielectric layer is in direct contact with the ZnO nanowires. Other embodiments are described and claimed.
申请公布号 US9627320(B2) 申请公布日期 2017.04.18
申请号 US201113976008 申请日期 2011.12.23
申请人 INTEL CORPORATION 发明人 Panat Rahul;Jaiswal Bhanu
分类号 H01L23/485;H01L23/532;B82Y30/00;H01L21/02;H01L29/06;H01L23/498;H01L21/768 主分类号 H01L23/485
代理机构 Konrad Raynes Davda & Victor LLP 代理人 Konrad Raynes Davda & Victor LLP ;Raynes Alan S.
主权项 1. An electronic device comprising: a substrate, a first electrically conductive region on the substrate, the first electrically conductive region comprising a trace including a metal layer; a plurality of nanowires positioned on the trace, the plurality of nanowires each including a first end in direct contact with the metal layer and a second end that is electrically isolated from any additional electrically conductive regions comprising a trace on the substrate; a first dielectric layer positioned in direct contact with the plurality of nanowires; an additional trace comprising a metal layer positioned on the first dielectric layer, and a plurality of additional nanowires positioned on the additional trace, wherein the first dielectric layer is positioned between the additional trace and the plurality of nanowires, and wherein the first dielectric layer is positioned between the additional trace and the substrate; and a second dielectric layer positioned on the plurality of additional nanowires, wherein the second dielectric layer is separated from the substrate by at least the first dielectric layer.
地址 Santa Clara CA US