DETECTING POWER SUPPLY SAG IN AN INTEGRATED CIRCUIT

摘要

An integrated circuit is provided with a voltage sag detector (VSD) within the integrated circuit package. The VSD is coupled to a voltage reference and to the power distribution bus within the integrated circuit. The VSD has an output for indicating when a voltage level on the power distribution bus sags below a voltage level provided by the voltage reference.

主权项

1. A process for monitoring voltage sag in an integrated circuit, the process comprising:
operating the integrated circuit for a period of time; comparing a reference voltage to a supply voltage level on a power bus within the integrated circuit using a comparator located within the integrated circuit; and latching an indicator bit to indicate when the voltage level on the power bus drops below the reference voltage.