| 发明名称 |
SYSTEMS AND METHODS FOR FILTERING AND COMPUTATION USING TUNNELLING TRANSISTORS |
| 摘要 |
An electrical circuit is disclosed that comprises plurality of tunneling field-effect transistors (TFETs) arranged in a diffusion network matrix having a plurality of nodes wherein, for each of the TFETs that is not on an end of the matrix, a drain of the TFET is electrically coupled with the source of at least one of the other TFETs at a node of the matrix and a source of the TFET is electrically coupled with the drain of at least one of the other TFETs at another node of the matrix. The electrical circuit further comprises a plurality of capacitors, wherein a respective one of the plurality of capacitors is electrically coupled with each node that includes the source of at least one TFET and the drain of at least one TFET. The TFETs may be symmetrical graphene-insulator-graphene field-effect transistors (SymFETs), for example. |
| 申请公布号 |
US2017103979(A1) |
申请公布日期 |
2017.04.13 |
| 申请号 |
US201514881759 |
申请日期 |
2015.10.13 |
| 申请人 |
University of Notre Dame du Lac |
发明人 |
Sedighi Behnam;Hu Xiaobo Sharon;Niemier Michael;Nahas Joseph |
| 分类号 |
H01L27/06;H03K17/687;H01L49/02;H01L29/786;H01L29/16;H01L27/02 |
主分类号 |
H01L27/06 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An electrical circuit comprising:
a plurality of tunneling field-effect transistors (TFETs) arranged in a diffusion network matrix having a plurality of nodes wherein, for each of the TFETs that is not on an end of the matrix, a drain of the TFET is electrically coupled with the source of at least one of the other TFETs at a node of the matrix and a source of the TFET is electrically coupled with the drain of at least one of the other TFETs at another node of the matrix; and a plurality of capacitors, wherein a respective one of the plurality of capacitors is electrically coupled with each node that includes the source of at least one TFET and the drain of at least one TFET. |
| 地址 |
Notre Dame IN US |
