发明名称 |
Semiconductor device |
摘要 |
A method of forming a semiconductor device comprises bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a plurality of chip package portions. The capping wafer comprises a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is configured to substantially align with a corresponding chip package portion of the plurality of chip package portions. The method also comprises separating the wafer package into a plurality of chip packages. Each chip package of the plurality of chip packages comprises at least one chip package portion of the plurality of chip package portions. |
申请公布号 |
US9617143(B2) |
申请公布日期 |
2017.04.11 |
申请号 |
US201414585634 |
申请日期 |
2014.12.30 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
Cheng Chun-wen;Peng Jung-Huei;Tsai Shang-Ying;Tsai Hung-Chia;Teng Yi-Chuan |
分类号 |
H01L29/84;B81B7/00;B81B7/04;B81C1/00;B81B7/02 |
主分类号 |
H01L29/84 |
代理机构 |
Hauptman Ham, LLP |
代理人 |
Hauptman Ham, LLP |
主权项 |
1. A method of forming a semiconductor device comprising: bonding a capping wafer and a base wafer to form a wafer package, the base wafer comprising a plurality of chip package portions, the capping wafer comprising a plurality of isolation trenches, and each isolation trench of the plurality of isolation trenches being configured to substantially align with a corresponding chip package portion of the plurality of chip package portions; separating the wafer package into a plurality of chip packages, each chip package of the plurality of chip packages comprising at least one chip package portion of the plurality of chip package portions; forming a plurality of communication openings in the capping wafer, the plurality of communication openings comprising a first pair of communication openings configured to substantially align a first chip package portion of the plurality of chip package portions, and a second pair of communication openings configured to substantially align with a second chip package portion of the plurality of chip package portions; depositing a dielectric material in the plurality of communication openings; and forming the plurality of isolation trenches between the pairs of communication openings. |
地址 |
TW |