Indirect instruction predication

摘要

A circuit arrangement and program product selectively predicate instructions in an instruction stream by determining a first register address from an instruction, determining a second register address based on a value stored at the first register address, and determining whether to predicate the instruction based at least in part on a value stored at the second register address. Predication logic may analyze the instruction to determine the first register address, analyze a register corresponding to the first register address to determine the second register address, and communicate a predication signal to an execution unit based at least in part on the value stored at the second register address.

主权项

1. A circuit arrangement, comprising:
a processing unit; a first register disposed in the processing unit, the first register including a plurality of register entries; an execution unit disposed in the processing unit and configured to receive a predication enable signal that indicates whether to predicate an instruction and selectively predicate instructions based at least in part on the predication enable signal; and predication logic disposed in the processing unit and configured to receive a first register address corresponding to the first register included in the instruction, select one of the plurality of register entries of the first register using the first register address, determine a second register address based at least in part on a first value stored at the first register address of the first register, and communicate the predication enable signal based at least in part on a second value stored at the second register address to selectively predicate the instruction, wherein the predication logic is configured to determine the second register address by accessing the selected one of the plurality of register entries to obtain the first value, and wherein the predication logic is configured to communicate the predication enable signal by addressing a second register using the first value to obtain the second value from the second register, wherein the predication enable signal is based on the second value stored at the second register address.