Memory provided with associated volatile and non-volatile memory cells

摘要

A memory array including: a plurality of volatile memory cells, each including a latch; and a plurality of non-volatile memory cells, each including at least one resistive element that can be programmed by the direction of a current passed therethrough in order to take at least two resistive states, each of the non-volatile memory cells being associated with a corresponding cell from the volatile memory cells.

主权项

1. A memory array comprising:
a plurality of volatile memory cells each comprising a latch; a plurality of non-volatile memory cells each comprising at least one resistive element programmable by the direction of current passed through it to have one of at least two resistive states, wherein each of the non-volatile memory cells is associated with a corresponding one of said volatile memory cells; and a read/write circuit coupled to each of the volatile and non-volatile memory cells via one or more pairs of bit lines, the read/write circuit having a comparator adapted to read a first data bit stored by a first of the volatile memory cells and to read a second data bit stored by a second of the non-volatile memory cells.