发明名称 Optical communication system
摘要 Consistent with the present disclosure a transmitter is provided that transmits data in either a “quasi-DP-BPSK” (“QDP”) mode or in a DP-QPSK mode. In the QDP mode, data bits are transmitted as changes in phase between first and second phase states along a first axis or as changes in phase between third and fourth phase states along a second axis in the IQ plane. Although the transmitter outputs an optical signal that changes in phase between each of the four states, a sequence bit identifies which axis carries the data bit. The sequence bit is one of a series of sequence bits that may be generated by a pseudo-random number generator. The series of sequence bits can be relatively long, e.g., 32 bits, to permit sufficiently random changes in the axis that carries the data. Thus, unlike conventional BPSK, in which data is transmitted between phase states along a single axis, the present disclosure provides an apparatus and related method for randomly selecting one of two axes, for example, for each transmitted bit. In the receiver, it has been observed that the MU-CMA algorithm can process data carried by optical signals in the QDP mode with relatively few errors. Thus, the same equalizer (FIR) filter may be used to process BPSK, as well as QPSK data.
申请公布号 US9621274(B2) 申请公布日期 2017.04.11
申请号 US201113082378 申请日期 2011.04.07
申请人 Infinera Corporation 发明人 McNicol John D.;Wu Kuang-Tsan
分类号 H04B10/06;H04B10/50;H04B10/556 主分类号 H04B10/06
代理机构 代理人 Soltz David L.
主权项 1. An apparatus, comprising: a demodulator circuit configured to receive an optical signal carrying a plurality of data bits and a local oscillator signal, the demodulator circuit supplying a plurality of demodulated outputs; an equalizer circuit; and a first and second circuit blocks coupled to the equalizer circuit, the first circuit block providing first outputs including quadrature phase shift keying (QPSK) decoded data and the second circuit block outputting binary phase shift keying (BPSK) decoded data, the second circuit block including: a sequence generator circuit that supplies a sequence of bits,wherein the optical signal has an associated constellation in an I-Q plane, the constellation including a plurality of phase states, first and second ones of the plurality of phase states being along a first axis in the I-Q plane, and third and fourth ones of the plurality of phase states being along a second axis in the I-Q plane,wherein, a first one of the sequence of bits has a first value that indicates that a corresponding first one of the plurality of data bits is associated with one of the first and second ones of the plurality of phase states, and a second one of the sequence of bits has a second value different than the first value that indicates that a corresponding second one of the plurality of data bits is associated with one of the third and fourth ones of the plurality of phase states; a carrier recovery circuit configured to supply in-phase (I) and quadrature (Q) components associated with the modulated optical signal; a switch circuit configured to select one of the I and Q components; and a decoder circuit configured to decode the selected one of the I and Q components and output the plurality of data bits in response thereto, each of the carrier recovery circuit, the switch circuit and the decoder circuit receiving the first sequence of bits.
地址 Sunnyvale CA US