发明名称 Integrated Schottky diode in high voltage semiconductor device
摘要 This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions and e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions.
申请公布号 US9620584(B2) 申请公布日期 2017.04.11
申请号 US201414454696 申请日期 2014.08.07
申请人 Alpha and Omega Semiconductor Incorporated 发明人 Guan Lingpeng;Bhalla Anup;Bobde Madhur;Zhu Tinggang
分类号 H01L29/78;H01L29/06;H01L29/66;H01L29/739 主分类号 H01L29/78
代理机构 代理人 Lin Bo-In
主权项 1. A method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area comprising: growing and patterning a field oxide layer in said termination area and also in said active cell are on a top surface of said semiconductor substrate wherein the field oxide layer in the termination area is patterned into a plurality of field oxide segments with a gap between two adjacent segments; growing a gate oxide layer on said top surface of said semiconductor substrate followed by depositing and patterning a polysilicon layer to form a gate segment on top of the gate oxide layer in the active cell area at a gap distance away from said field oxide layer in the active cell area and patterning the polysilicon layer in the termination area for partially covering a top surface of the field segments, a sidewall of the field oxide segments and partially over a part of the gap between the field oxide segments in the termination area; and performing a blank body dopant implant to form body dopant regions substantially aligned with said gap between the field oxide layer and the gate segment in the active cell area followed by diffusing said body dopant regions into body regions in the active cell area of said semiconductor substrate and wherein the blank body dopant implant also simultaneously forming guard rings in the semiconductor substrate not covered by the field oxide segments in the termination area.
地址 Sunnyvale CA US