CPU of PLC, system program for PLC, and recording medium storing system program for PLC

摘要

A scheduler causes a microprocessor to start execution of a first control program after a communication circuit transmits output data and receives input data in a control cycle following a control circle in which execution of the first control program has ended, and causes execution of an unexecuted portion of the first control program in a control cycle following a control cycle in which execution of the first control cycle has not ended.

主权项

1. A central processing unit (CPU) of a programmable logic controller (PLC), the CPU comprising:
a microprocessor that executes a first control program and a scheduler program, the first control program, when executed by the microprocessor, generates output data using input data, and the scheduler program, when executed by the microprocessor, controls execution of the first control program; a memory that stores the first control program and the scheduler program; a setting unit that determines a period of a control cycle; and a communication circuit that transmits the output data and receives the input data for every control cycle; the scheduler program, when executed by the microprocessor,
causes the microprocessor to start execution of the first control program after the communication circuit transmits the output data and receives the input data, in a control cycle following a control cycle in which the first control program has ended; andcauses the microprocessor to execute an unexecuted portion of the first control program in a control cycle following a control cycle in which the first control program has not ended, wherein the CPU is configured to control a control target of the PLC by repeating transmission of the output data, reception of the input data, and execution of the first control program.