Idle-aware margin adaption

摘要

Monitoring is performed for a requested change in a number of active processor cores within a multi-core processor. A current power level setting of the multi-core processor is checked based on the requested change in the number of active processor cores. A targeted power level setting associated with the requested change in the number of active processor cores is determined, where the targeted power level setting incorporates a worst case noise level margin defined on an active processor core basis. The current power level setting is adjusted to align with the targeted power level based on determining that the current power level setting fails to meet the targeted power level within a threshold band.

主权项

1. A method comprising:
determining a plurality of possible stressmarks of a multi-core processor based on an instruction set architecture of the multi-core processor including a range of noise stressmarks from a no noise stressmark to a medium noise stressmark to a maximum noise stressmark; determining a plurality of worst case noise curves determined based on running all combinations of the range of noise stressmarks for the multi-core processor with a varying number of cores enabled in a worst case noise analysis process capturing effects of circuit layout and physical location, interactions with neighboring instances of active processor cores, and the instruction set architecture of the multi-core processor; monitoring for a requested change in a number of active processor cores within the multi-core processor during operation of the multi-core processor; checking a current power level setting of the multi-core processor based on the requested change in the number of active processor cores; determining during operation of the multi-core processor, a targeted power level setting associated with the requested change in the number of active processor cores, wherein the targeted power level setting incorporates a noise guard band that is dynamically adjusted based on a worst case noise level margin defined on an active processor core basis, and the worst case noise level margin is based on the worst case noise curves as a function of the requested change in the number of active processor cores; and adjusting the current power level setting during operation of the multi-core processor to align with the targeted power level based on determining that the current power level setting fails to meet the targeted power level within a threshold band.