INTERCONNECT STRUCTURES FOR FINE PITCH ASSEMBLY OF SEMICONDUCTOR STRUCTURES

摘要

A semiconductor structure includes a substrate having first and second opposing surfaces and a plurality of electrical connections extending between the first and second surfaces. The semiconductor structure also includes one or more interconnect pads having first and second opposing surfaces and one or more sides. The first surface of each one of the interconnect pads is disposed over or beneath select portions of at least the second surface of the substrate and is electrically coupled to select ones of the plurality of electrical connections. The semiconductor structure additionally includes an isolating layer having first and second opposing surfaces and openings formed in select portions of the isolating layer extending between the second surface of the isolating layer and the second surfaces of the interconnect pads. A corresponding method for fabricating a semiconductor structure is also provided.

主权项

1. A method for fabricating a semiconductor structure, comprising:
providing a substrate having first and second opposing surfaces and a plurality of electrical connections extending between the first and second surfaces; providing one or more interconnect pads having first and second opposing surfaces and one or more sides, wherein the first surface of each one of the interconnect pads is disposed over or beneath select portions of at least the second surface of the substrate and is electrically coupled to select ones of the plurality of electrical connections; applying an isolating layer having first and second opposing surfaces, wherein the first surface of the isolating layer is disposed over the second surface of the substrate and the second surfaces and one or more sides of the interconnect pads; forming openings having a predetermined shape in select portions of the isolating layer extending between the second surface of the isolating layer and the first surface of the isolating layer; providing one or more pad interconnects having a pad portion and an interconnect portion, wherein the pad portion of each one of the pad interconnects has a surface disposed over select portions of the second surface of the isolating layer and the interconnect portion of each one of the pad interconnects extends from the pad portion to second surfaces of the interconnect pads and has a surface disposed over select edges of the openings formed in the isolating layer; and disposing one or more conductive structures in each of the openings formed in the isolating layer, wherein the conductive structures are electrically coupled to second surfaces of the interconnect pads to form an interconnect for electrically and mechanically coupling the semiconductor structure to other semiconductor structures and devices.